This invention relates generally to the fabrication and testing of semiconductor wafers having discrete semiconductor dice. More specifically, the present invention relates to methods of temporarily isolating semiconductor dice from a common conductor during wafer level testing.
In semiconductor manufacture, a large number of often complex electrical devices, also known as dice or integrated circuit (IC) chips, are fabricated on a semiconductor wafer. After fabrication, the dice are subjected to a series of test procedures prior to wafer dicing and packaging to assess the electrical characteristics of the circuitry of each. Dice which are determined to meet specifications are allowed to continue in the manufacturing process. Those which do not meet specifications are removed from the manufacturing process.
One series of testing is known as a xe2x80x9cwafer level test,xe2x80x9d which applies stress conditions to the dice on the wafer in an effort to accelerate certain types of failures. Wafer level testing may involve elevated voltage, elevated temperature, elevated humidity or any other condition which a manufacturer deems appropriate to expose failures which can be detected using test equipment.
To facilitate wafer level testing, a common conductor, e.g., a buss, may be provided which interfaces a plurality of dice under test such that a signal is propagated to the plurality of dice simultaneously. One exemplary common conductor may, for example, connect individual die power inputs to a common power source, e.g., Vcc, Vss. Other common conductors may be used to supply other signals in common to the dice under test.
The use of a common conductor to supply a signal to multiple dice has its drawbacks. When a die is found to be defective, the defective die must be isolated from the common conductor(s) so that non-defective dice are not affected by electrical conditions occurring at the defective die.
One way to facilitate high reliability die isolation from a common conductor is by use of a permanent isolation device, for example a fuse. A fuse may be interposed between the common conductor and each die ensuring permanent isolation from the common conductor when the fuse is blown. While fuses and similar permanent isolation devices provide permanent isolation of a device from a common conductor, they do not permit a temporary isolation of a die from a common conductor. Thus individual die isolation and testing cannot be performed without permanently disconnecting a die from the common conductor.
The present invention provides an apparatus which facilitates temporary isolation of a die from one or more common conductors during wafer level testing. The one or more common conductors extend over a wafer and are connected to a plurality of dice on the wafers which are undergoing testing. A temporary isolation device (e.g., a diode, transistor or other element) is interposed between each die and the common conductor. The temporary isolation device can be used to isolate a die from the common conductor during wafer level testing whenever such isolation is needed.
A permanent isolation device may also be provided in the path between each die under test and the common conductor to provide permanent isolation whenever permanent isolation is needed.